------------------------------------------------//库声明
LIBRARY IEEE; 
USE IEEE.STD_LOGIC_1164.ALL; 
USE IEEE.STD_LOGIC_UNSIGNED.ALL; 
USE IEEE.STD_LOGIC_ARITH.ALL;

------------------------------------------------//实体定义
ENTITY tiaozhi IS
PORT
(    clk_in : IN STD_LOGIC; 
     romzhi : IN INTEGER RANGE 0 to 127;
	  shuzhi : IN INTEGER RANGE 0 to 127;
	 pwm_out : OUT STD_LOGIC
	      );
END tiaozhi;

------------------------------------------------//结构体定义
ARCHITECTURE behave OF tiaozhi IS

------------------------------------------------//信号量定义
signal pwm_temp : std_logic;

BEGIN 

------------------------------------------------//进程1，pwm波产生
    PROCESS(clk_in)
    BEGIN
        IF clk_in'EVENT AND clk_in ='1' THEN
            IF shuzhi<=romzhi THEN 
                pwm_temp<='1'; 
            ELSE   
				    pwm_temp<='0'; 
            END IF;
        END IF;
    END PROCESS;
	 
------------------------------------------------//赋值	
	 pwm_out <= pwm_temp;	 

END ARCHITECTURE behave;